This invention relates to a semiconductor integrated circuit device, and to a technique effective for use in semiconductor integrated circuit devices of the type activated in synchronism with a clock signal, such as a synchronous dynamic RAM (Random Access Memory) having a synchronous clock generator, a one-chip microcomputer provided with a synchronous clock generator for generating an internal clock obtained by frequency-multiplying an external clock, etc.
A synchronous mirror delay circuit (SMD) is a circuit for synchronizing an external clock and an internal clock with each other. This type of synchronous mirror delay circuit has been disclosed in the ISSCC DIGEST OF TECHNICAL PAPERS, p.p. 374-375, Feb. 10, 1996 and Japanese Patent Laid-Open No. 8-237091.